AMD-8132BLCT AMD (ADVANCED MICRO DEVICES), AMD-8132BLCT Datasheet - Page 37

• Manufacturer Part Number: AMD-8132BLCT
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AMD-8132BLCT

• Lead Free Status / RoHS Status: Not Compliant

26792 Rev. 3.07 July 2005
Figure 11. Single-Slot Hot-Plug Enable/Disable Sequence
Notes:
The AMD-8132 tunnel [B,A]_PCIXCAP pins are used as [B,A]_HP_SID (Serial Input Data). PCIXCAP and
PRSNT[1:2]_L from the slot are connected to the TPS* hot-plug power controller.
If the TPS2340A is used, the AMD-8132 tunnel [B,A]_M66EN pins are connected directly to the slot with a
pullup resistor to the slot power plane. This pin remains tri-stated until the SHPC enables the slot so the state
provided by the card in the slot can be observed. This pin is driven low by the AMD-8132 tunnel if the bus is to
run in 33 MHz conventional PCI mode.
If the TPS2342 is used, the AMD-8132 tunnel [B,A]_M66EN pins are left unconnected. The slot M66EN pin
is driven low by the TPS2342 if the bus is to run in 33 MHz conventional PCI mode.
The process of setting the state of [B,A]_M66EN is the same as in multi-slot mode.
Chapter 1
• CLKEN_L and BUSEN_L are connected to the AMD-8132 tunnel.
• CLKEN and BUSEN represent the approximate times in which the TPS* changes the state of its CLKENx_L and
• PWREN represents the times in which the TPS* enables power to the slot.
• Most slot signals includes the signals controlled by BUSENx_L in section 1.3.7.1.
[B,A]_RESET_L
PWREN
CLKEN
BUSEN
Most slot signals
[B,A]_PCLK0
[B,A]_M66EN
[B,A]_REQ0_L
Slot RESET_L
Slot Power
BUSENx_L signals.
Slot Enable Command Sequence
Tri-state; input ignored
120-150 ms
Tri-state
PCLK Cycles
Functional Operation
About 22
60-90 ms
1 if conventional PCI, 66 MHz; otherwise 0
AMD-8132™ HyperTransport™ PCI-X
Observed as an input
Valid
Valid
Slot Disable Command Sequence
Tri-state; input ignored
6-10 us
PCLK Cycles
About 22
Tri-state
6-10 us
®
2.0 Tunnel Data Sheet
37