AMD-8132BLCT AMD (ADVANCED MICRO DEVICES), AMD-8132BLCT Datasheet - Page 44

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AMD-8132BLCT

Manufacturer Part Number
AMD-8132BLCT
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AMD-8132BLCT

Lead Free Status / RoHS Status
Not Compliant
AMD-8132™ HyperTransport™ PCI-X
2.1
In the following table are signals associated with the HyperTransport links. In the signal names:
In the table columns:
44
Pin Name. Description
L[1,0]_CADIN_[H,L][15:0]. HyperTransport™ links 1 and 0 receive
command-address-data bus.
L[1,0]_CADOUT_[H,L][15:0]. HyperTransport™ links 1 and 0 transmit
command-address-data bus.
L[1,0]_CLKIN_[H,L][1:0]. HyperTransport™ links 1 and 0 receive link
clocks.
L[1,0]_CLKOUT_[H,L][1:0]. HyperTransport™ links 1 and 0 transmit link
clocks. Bit 1 corresponds to CADOUT[15:8].
L[1,0]_COMP_[PU,PD]. HyperTransport™ impedance compensation pins
for both sides of the tunnel. These are designed to be connected through
resistors as follows:
L[1,0]_COMP_PU = pullup to VDD
L[1,0]_COMP_PD = pulldown to VSS
L[1,0]_CTLIN_[H,L]0. HyperTransport™ links 1 and 0 receive control
signal.
L[1,0]_CTLOUT_[H,L]0. HyperTransport™ links 1 and 0 transmit control
signal.
LDTREQ_L. HyperTransport™ wake up.
LDTRESET_L. Reset input. See section 4.2.1 for details. LDTRESET_L is
also used as the hot-plug [B,A]_HPSOR_L reset. When LDTRESET_L is
asserted, the hot-plug shift register and control latches are reset.
LDTSTOP_L. Link disconnect control signal.
PWROK. Power OK. 1 = All power planes and REFCLK are valid. The
rising edge of this signal is deglitched; it is not observed internally until it is
high for more than six consecutive REFCLK cycles. Behavior follows the
requirements in HyperTransport™I/O Link Specification, Rev 2.0. For more
details about this signal, see section 4.2.1.
Notes:
** Diff High and Diff Low for these link pins specify differential high and low; e.g: Diff High specifies that the _H signal is
• [1,0] refers to the two sides of the tunnel.
• [H,L] refers to the positive and negative sides of differential pairs.
• _L in single-ended signals indicates the signal is active low.
high and the _L signal is low.
During Reset
After Reset
Func.
indicates the pin is functional and operating per its defined function.
HyperTransport™ Link Signals
provides the state of the pin immediately after LDTRESET_L is deasserted.
provides the state of the pin while LDTRESET_L is asserted.
®
2.0 Tunnel Data Sheet
Signal Descriptions
I
O
I
O
Analog VLDT
I
O
OD
I
I
I
Type
Cell
I/O
Power
Plane
VLDT
VLDT
VLDT
VLDT
VLDT
VLDT
V33
V33
V33
V33
26792 Rev. 3.07 July 2005
During
Reset
Diff
High**
Func.
Diff
Low**
Chapter 2
After
Reset
Func.
Func.
Func.

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