AMD-8132BLCT AMD (ADVANCED MICRO DEVICES), AMD-8132BLCT Datasheet - Page 53

• Manufacturer Part Number: AMD-8132BLCT
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AMD-8132BLCT

• Lead Free Status / RoHS Status: Not Compliant

26792 Rev. 3.07 July 2005
2.4
The following signals are sorted by pin name.
2.5
During reset, the state of several pins is monitored to configure the bridges. These pins require either a weak
pullup to V33 (value = 1) or weak pulldown to VSS (value = 0). All of the strap information is latched at the
rising edge of PWROK. The following are sorted by pin name.
Chapter 2
Pin Name. Description
PLL_VDDA[2:1]. Analog 3.3-volt power plane for PLLs in the core of the AMD-8132™ tunnel. Filtering this
power plane from digital noise is required.
V33. 3.3-volt power plane for I/O.
VDD. 1.2-volt power plane for the core of the AMD-8132 tunnel.
VDD3FB_H. VDD3 feedback. VDD3FB_H is tied to V33 on the die and can be used to measure the power
supply noise at the die. Potentially, it can be used as the feedback to a V33 regulator to boost the supply in
compensation for the package drop.
VDDFB_[H,L]. Core feedback. VDDFB_[H, L] are routed on the package as a differential pair to the to die.
VDDFB_H is tied to VDD12 on the die and VDDFB_L is tied to ground.
VIO[B,A]. In systems not capable of running in Mode 2, this is always 3.3 volts. In systems that can run in
Mode 2, VIOSEL ([B,A]_REQ_L1) is high to select 3.3 volts and low to select 1.5 volts.
VLDT. 1.2 volt power plane for the HyperTransport™ technology pins.
VSS. Ground.
Pin
PCIXA_100
PCIXB_100
Power and Ground
Straps During Initialization
Strap. Description.
DevA:0x48[PCIX100]. Sets the maximum speed of the DevA PCI-X
common clock.
For PCI-X Mode 1:
• Low (133) = 133 MHz clock
• High (100) = 100 MHz clock
For PCI-X Mode 2 DDR:
• Low (133) = a data rate of 266 MHz
• High (100) = a data rate of 200 MHz
DevB:0x48:[PCIX100]. Sets the maximum speed of the DevB PCI-X
common clock.
For PCI-X Mode 1:
• Low (133) = 133 MHz clock
• High (100) = 100 MHz clock
For PCI-X Mode 2 DDR:
• Low (133) = a data rate of 266 MHz
• High (100) = a data rate of 200 MHz
Signal Descriptions
AMD-8132™ HyperTransport™ PCI-X
®
®
®
2.0 Tunnel Data Sheet
Low/High
Low = 133
High = 100
Low = 133
High = 100
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