D12363VTE33 Renesas Electronics America, D12363VTE33 Datasheet - Page 196

MCU 3V 0K 120-TQFP

D12363VTE33

Manufacturer Part Number
D12363VTE33
Description
MCU 3V 0K 120-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of D12363VTE33

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412363VTE33
HD6412363VTE33

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12363VTE33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 6 Bus Controller (BSC)
Bit
10
9
8
7
Rev.6.00 Mar. 18, 2009 Page 136 of 980
REJ09B0050-0600
Bit Name
RMTS2
RMTS1
RMTS0
BE
Initial Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
DRAM Space Select
These bits designate DRAM space for areas 2
to 5.
When continuous DRAM space is set, it is
possible to connect large-capacity DRAM
exceeding 2 Mbytes per area. In this case, the
RAS signal is output from the CS2 pin.
000: Normal space
001: Normal space in areas 3 to 5
010: Normal space in areas 4 and 5
011: Reserved (setting prohibited)
100: Reserved (setting prohibited)
101: Reserved (setting prohibited)
110: Reserved (setting prohibited)
111: Continuous DRAM space in areas 2 to 5
Burst Access Enable
Selects enabling or disabling of burst access to
areas designated as DRAM space. DRAM
space burst access is performed in fast page
mode. When using EDO page mode DRAM, the
OE signal must be connected.
0: Full access
1: Access in fast page mode
DRAM space in area 2
DRAM space in areas 2 and 3

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