D12363VTE33 Renesas Electronics America, D12363VTE33 Datasheet - Page 230

MCU 3V 0K 120-TQFP

D12363VTE33

Manufacturer Part Number
D12363VTE33
Description
MCU 3V 0K 120-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of D12363VTE33

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412363VTE33
HD6412363VTE33

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12363VTE33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 6 Bus Controller (BSC)
6.6.7
If the RAST bit is set to 1 in DRAMCR, the RAS signal goes low from the beginning of the T
state, and the row address hold time and DRAM read access time are changed relative to the fall of
the RAS signal. Use the optimum setting according to the DRAM connected and the operating
frequency of this LSI. Figure 6.22 shows an example of the timing when the RAS signal goes low
from the beginning of the T
Rev.6.00 Mar. 18, 2009 Page 170 of 980
REJ09B0050-0600
Figure 6.22 Example of Access Timing when RAS Signal Goes Low from Beginning
Read
Write
Note: n = 2, 3
Row Address Output State Control
φ
Address bus
RASn (CSn)
UCAS, LCAS
WE (HWR)
OE (RD)
Data bus
WE (HWR)
OE (RD)
Data bus
r
state.
of T
T
p
Row address
r
State (CAST = 0)
T
r
High
High
T
c1
Column address
T
c2
r

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