D12363VTE33 Renesas Electronics America, D12363VTE33 Datasheet - Page 810

MCU 3V 0K 120-TQFP

D12363VTE33

Manufacturer Part Number
D12363VTE33
Description
MCU 3V 0K 120-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of D12363VTE33

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412363VTE33
HD6412363VTE33

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12363VTE33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 20 Flash Memory (0.18-μm F-ZTAT Version)
Table 20.6 System Clock Frequency for Automatic-Bit-Rate Adjustment by This LSI
(2)
The overview of the state transition diagram after boot mode is initiated is shown in figure 20.8.
1. Bit rate adjustment
2. Waiting for inquiry set command
3. Automatic erasure of all user MAT and user boot MAT
4. Waiting for programming/erasing command
Rev.6.00 Mar. 18, 2009 Page 750 of 980
REJ09B0050-0600
Bit Rate of Host
9,600 bps
19,200 bps
After boot mode is initiated, the bit rate of the SCI interface is adjusted with that of the host.
For inquiries about user-MAT size and configuration, MAT start address, and support state,
the required information is transmitted to the host.
After inquiries have finished, all user MAT and user boot MAT are automatically erased.
⎯ When the program preparation notice is received, the state for waiting program data is
Programming finished area
State Transition Diagram
entered. The programming start address and program data must be transmitted following
the programming command. When programming is finished, the programming start address
must be set to H'FFFFFFFF and transmitted. Then the state for waiting program data is
returned to the state of programming/erasing command wait. Before reprogramming erased
blocks containing a programming finished area for which the programming finished
command has been issued, make sure to erase the corresponding erased blocks.
:
System Clock Frequency
8 to 25 MHz
8 to 25 MHz
:
EB9
EB10
EB11
EB12
Before reprogramming erased blocks containing a programming
finished area (EB10 and EB11), the corresponding erased
blocks (EB10 and EB11) should be erased.

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