D12363VTE33 Renesas Electronics America, D12363VTE33 Datasheet - Page 640

• Manufacturer Part Number: D12363VTE33
• Description: MCU 3V 0K 120-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12363VTE33

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412363VTE33; HD6412363VTE33

Section 14 Serial Communication Interface (SCI, IrDA)
14.4.4
Before transmitting and receiving data, you should first clear the TE and RE bits in SCR to 0, then
initialize the SCI as shown in figure 14.5. Do not write to SMR, SCMR, IrCR, or SEMR while the
SCI is operating. This also applies to writing the same data as the current register contents. When
the operating mode, transfer format, etc., is changed, the TE and RE bits must be cleared to 0
before making the change. When the TE bit is cleared to 0, the TDRE flag is set to 1. Note that
clearing the RE bit to 0 does not initialize the contents of the RDRF, PER, FER, and ORER flags,
or the contents of RDR. When the external clock is used in asynchronous mode, the clock must be
supplied even during initialization.
Rev.6.00 Mar. 18, 2009 Page 580 of 980
REJ09B0050-0600
Set CKE1 and CKE0 bits in SCR
SCR to 1, and set RIE, TIE, TEIE,
Clear TE and RE bits in SCR to 0
SCI Initialization (Asynchronous Mode)
Set data transfer format in
<Initialization completed>
1-bit interval elapsed?
Set TE and RE bits in
Start of initialization
SMR and SCMR
Set value in BRR
(TE, RE bits 0)
and MPIE bits
Figure 14.5 Sample SCI Initialization Flowchart
Yes
Wait
No
[1]
[2]
[3]
[4]
[1] Set the clock selection in SCR.
[2] Set the data transfer format in SMR
[3] Write a value corresponding to the
[4] Wait at least one bit interval, then
Be sure to clear bits RIE, TIE,
TEIE, and MPIE, and bits TE and
RE, to 0.
When the clock is selected in
asynchronous mode, it is output
immediately after SCR settings are
made.
and SCMR.
bit rate to BRR. (Not necessary if
an external clock is used.)
set the TE bit or RE bit in SCR to 1.
Also set the RIE, TIE, TEIE, and
MPIE bits.
Setting the TE and RE bits enables
the TxD and RxD pins to be used.