D12363VTE33 Renesas Electronics America, D12363VTE33 Datasheet - Page 591

• Manufacturer Part Number: D12363VTE33
• Description: MCU 3V 0K 120-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12363VTE33

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412363VTE33; HD6412363VTE33

13.3
The WDT has the following three registers. To prevent accidental overwriting, TCSR, TCNT, and
RSTCSR have to be written to in a method different from normal registers. For details, refer to
section 13.6.1, Notes on Register Access.
• Timer counter (TCNT)
• Timer control/status register (TCSR)
• Reset control/status register (RSTCSR)
13.3.1
TCNT is an 8-bit readable/writable up-counter. TCNT is initialized to H'00 when the TME bit in
TCSR is cleared to 0.
13.3.2
TCSR selects the clock source to be input to TCNT, and the timer mode.
Bit
7
Bit Name
OVF
Register Descriptions
Timer Counter (TCNT)
Timer Control/Status Register (TCSR)
Initial Value
0
R/W
R/(W) *
Description
Overflow Flag
Indicates that TCNT has overflowed in interval
timer mode. Only a write of 0 is permitted, to
clear the flag.
[Setting condition]
When TCNT overflows in interval timer mode
(changes from H’FF to H’00)
When internal reset request generation is
selected in watchdog timer mode, OVF is cleared
automatically by the internal reset.
[Clearing condition]
Cleared by reading TCSR when OVF = 1, then
writing 0 to OVF
Rev.6.00 Mar. 18, 2009 Page 531 of 980
Section 13 Watchdog Timer
REJ09B0050-0600