D12363VTE33 Renesas Electronics America, D12363VTE33 Datasheet - Page 585

• Manufacturer Part Number: D12363VTE33
• Description: MCU 3V 0K 120-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12363VTE33

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412363VTE33; HD6412363VTE33

12.8.4
If compare match events A and B occur at the same time, the 8-bit timer operates in accordance
with the priorities for the output statuses set for compare match A and compare match B, as shown
in table 12.4.
Table 12.4 Timer Output Priorities
Output Setting
Toggle output
1 output
0 output
No change
12.8.5
TCNT may increment erroneously when the internal clock is switched over. Table 12.5 shows the
relationship between the timing at which the internal clock is switched (by writing to the CKS1
and CKS0 bits) and the TCNT operation.
When the TCNT clock is generated from an internal clock, the falling edge of the internal clock
pulse is detected. If clock switching causes a change from high to low level, as shown in case 3 in
table 12.5, a TCNT clock pulse is generated on the assumption that the switchover is a falling
edge. This increments TCNT.
The erroneous incrementation can also happen when switching between internal and external
clocks.
Contention between Compare Matches A and B
Switching of Internal Clocks and TCNT Operation
High
Priority
Low
Rev.6.00 Mar. 18, 2009 Page 525 of 980
Section 12 8-Bit Timers (TMR)
REJ09B0050-0600