D12363VTE33 Renesas Electronics America, D12363VTE33 Datasheet - Page 799

• Manufacturer Part Number: D12363VTE33
• Description: MCU 3V 0K 120-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12363VTE33

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412363VTE33; HD6412363VTE33

(b) Flash user branch address setting parameter (FUBRA: general register ER1 of CPU)
This parameter sets the user branch destination address. A specified user program can be used to
perform programming or erasing of processing units of predetermined size. When using the user
branch function, set the flash user branch enable bits in FPEFEQ to H'AAFF in addition to the
settings in this register.
Bits 31 to 0: User branch destination address (UA31 to UA0)
Bit
31 to 0
Bit
Name
UA31 to
UA0
Initial
Value
—
R/W
R/W
Description
User branch destination address
When no user branching is required, set address 0
(H'00000000). A user branch destination must be within
the RAM space other than the area occupied by the
internal program transferred, or the external bus space.
Proceed with caution to avoid branching to an area
without execution code, which would cause a runaway,
and avoid corrupting the internal program area or a stack
area. In the event of a program runaway, flash memory
values are not guaranteed.
During user-branched processing, do not download,
initialize, or invoke any programming/erase program
routines of the internal program. Programming/erasing
subsequent to the user branch routine cannot be
otherwise guaranteed. In addition, do not modify the
prepared data to be written. Likewise, do not rewrite the
programming/erase interface register during user
branched processing. After completing the user-branch
processing, return to the programming/erase program by
the RTS instructions.
Section 20 Flash Memory (0.18-μm F-ZTAT Version)
Rev.6.00 Mar. 18, 2009 Page 739 of 980
REJ09B0050-0600