D12363VTE33 Renesas Electronics America, D12363VTE33 Datasheet - Page 229

MCU 3V 0K 120-TQFP

D12363VTE33

Manufacturer Part Number
D12363VTE33
Description
MCU 3V 0K 120-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of D12363VTE33

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412363VTE33
HD6412363VTE33

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12363VTE33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
from both the RD pin and the (OE) pin, but in external read cycles for other than DRAM space,
the signal is output only from the RD pin.
6.6.6
The column address output cycle can be changed from 2 states to 3 states by setting the CAST bit
to 1 in DRAMCR. Use the setting that gives the optimum specification values (CAS pulse width,
etc.) according to the DRAM connected and the operating frequency of this LSI. Figure 6.21
shows an example of the timing when a 3-state column address output cycle is selected.
Read
Write
Note: n = 2, 3
Figure 6.21 Example of Access Timing with 3-State Column Address Output Cycle
Column Address Output Cycle Control
φ
Address bus
RASn (CSn)
UCAS, LCAS
WE (HWR)
OE (RD)
Data bus
WE (HWR)
OE (RD)
Data bus
T
p
Row address
(RAST = 0)
High
High
T
r
Rev.6.00 Mar. 18, 2009 Page 169 of 980
T
c1
Column address
Section 6 Bus Controller (BSC)
T
c2
REJ09B0050-0600
T
c3

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