D12363VTE33 Renesas Electronics America, D12363VTE33 Datasheet - Page 567

MCU 3V 0K 120-TQFP

D12363VTE33

Manufacturer Part Number
D12363VTE33
Description
MCU 3V 0K 120-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of D12363VTE33

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412363VTE33
HD6412363VTE33

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12363VTE33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
TIMH260A_000020020100
This LSI has an on-chip 8-bit timer module with two channels operating on the basis of an 8-bit
counter. The 8-bit timer module can be used to count external events and be used as a
multifunction timer in a variety of applications, such as generation of counter reset, interrupt
requests, and pulse output with an arbitrary duty cycle using a compare-match signal with two
registers.
12.1
• Selection of four clock sources
• Selection of three ways to clear the counters
• Timer output control by a combination of two compare match signals
• Provision for cascading of two channels (TMR_0 and TMR_1)
• Three independent interrupts
• A/D converter conversion start trigger can be generated
The counters can be driven by one of three internal clock signals (φ/8, φ/64, or φ/8192) or an
external clock input
The counters can be cleared on compare match A or B, or by an external reset signal
The timer output signal in each channel is controlled by a combination of two independent
compare match signals, enabling the timer to generate output waveforms with an arbitrary duty
cycle or PWM output
Operation as a 16-bit timer is possible, using TMR_0 for the upper 8 bits and TMR_1 for the
lower 8 bits (16-bit count mode)
TMR_1 can be used to count TMR_0 compare matches (compare match count mode)
Compare match A and B and overflow interrupts can be requested independently
Features
Section 12 8-Bit Timers (TMR)
Rev.6.00 Mar. 18, 2009 Page 507 of 980
Section 12 8-Bit Timers (TMR)
REJ09B0050-0600

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