PEB2254H-V14 Infineon Technologies, PEB2254H-V14 Datasheet - Page 116

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PEB2254H-V14

Manufacturer Part Number
PEB2254H-V14
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB2254H-V14

Operating Supply Voltage (typ)
5V
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Transmit CAS Register (Write)
Value after RESET: not defined
XS1
XS2
XS3
XS4
XS5
XS6
XS7
XS8
XS9
XS10
XS11
XS12
XS13
XS14
XS15
XS16
Transmit CAS Register 1-16
The transmit CAS register access is enabled by setting bit XSP.CASEN = 1. Each
register except XS1 contains the CAS bits for two timeslots. With the transmit multiframe
begin ISR1.XMB the contents of these registers will be copied into a shadow register.
The contents will subsequently sent out in the timeslots 16 of the outgoing data stream.
XS1.7 will be sent out first and XS16.0 will be sent last. The transmit multiframe begin
interrupt (XMB) requests that these registers should be serviced. If requests for new
information are ignored, current contents will be repeated. XS1 has to be programmed
with the multiframe pattern. This pattern should always stay low otherwise the remote
end will lose its synchronization. With setting the Y-bit a remote alarm will be transmitted
to the far end. The Y-bit is logically ored with bit CCR1.XTS16RA.
The X bits (Spare bits) should be set to one if they are not used.
Semiconductor Group
7
A10
A11
A12
A13
A14
A15
A1
A2
A3
A4
A5
A6
A7
A8
A9
0
B10
B11
B12
B13
B14
B15
B1
B2
B3
B4
B5
B6
B7
B8
B9
0
C10
C11
C12
C13
C14
C15
C1
C2
C3
C4
C5
C6
C7
C8
C9
0
D10
D11
D12
D13
D14
D15
D1
D2
D3
D4
D5
D6
D7
D8
D9
0
116
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
X
B16
B17
B18
B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
Y
Operational Description E1
C16
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
C27
C28
C29
C30
X
0
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
X
PEB 2254
(7A)
(7B)
(7C)
(7D)
(7E)
(70)
(71)
(72)
(73)
(74)
(75)
(76)
(77)
(78)
(79)
(7F)
11.96

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