PEB2254H-V14 Infineon Technologies, PEB2254H-V14 Datasheet - Page 275

• Manufacturer Part Number: PEB2254H-V14
• Manufacturer: Infineon Technologies

Specifications of PEB2254H-V14

• Operating Supply Voltage (typ): 5V
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Errored Block Counter (READ)
EBCL
EBCH
EBC15…EBC0… Errored Block Counter
Semiconductor Group
7
7
EBC15
EBC7
In ESF format this 16-bit counter will be incremented once per
multiframe if a multiframe has been received with a CRC error or an
errored frame alignment has been detected. CRC and framing errors
will not be counted during asynchronous state.
In F4/12/72 format an errored block contain 4/12 or 72 frames.
Incrementing is done once per multiframe if framing errors has been
detected.
Clearing and updating the counter is done according to bit
FMR1.ECM.
During alarm simulation, the counter is incremented in ESF format
once per multiframe and in F4/12/72 format only one time.
If this bit is reset the error counter is permanently updated in the
buffer. For correct read access of the error counter bit DEC.DEBC
has to be set. With the rising edge of this bit updating the buffer will
be stopped and the error counter will be reset. Bit DEC.DEBC will
automatically be reset with reading the error counter high byte.
If FMR1.ECM is set every second (interrupt ISR3.SEC) the error
counter will be latched and then automatically reset. The latched error
counter state should be read within the next second.
275
Operational Description T1
0
0
EBC0
EBC8
PEB 2254
(56)
(57)
11.96