PEB2254H-V14 Infineon Technologies, PEB2254H-V14 Datasheet - Page 136

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PEB2254H-V14

Manufacturer Part Number
PEB2254H-V14
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB2254H-V14

Operating Supply Voltage (typ)
5V
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
HA1, HA0…
LA…
Receive Byte Count Low (Read)
RBCL
Together with RBCH (bits RBC11 - RBC8), indicates the length of a received frame
(1…4095 bytes). Bits RBC4-0 indicate the number of valid bytes currently in RFIFO.
These registers must be read by the CPU following a RME interrupt.
Semiconductor Group
7
RBC7
High Byte Address Compare
Significant only if 2-byte address mode has been selected.
In operating modes which provide high byte address recognition, the
FALC54 compares the high byte of a 2-byte address with the contents
of two individually programmable registers (RAH1, RAH2) and the
fixed values FE
Dependent on the result of this comparison, the following bit
combinations are possible:
Note: If RAH1, RAH2 contain identical values, a match is indicated
Low Byte Address Compare
Significant in HDLC modes only.
The low byte address of a 2-byte address field, or the single address
byte of a 1-byte address field is compared with two registers. (RAL1,
RAL2).
00… RAH2 has been recognized
01… Broadcast address has been recognized
10… RAH1 has been recognized C/R = 0 (bit 1)
11… RAH1 has been recognized C/R = 1 (bit 1)
0… RAL2 has been recognized
1… RAL1 has been recognized
by ‘10’ or ‘11’.
H
and FC
136
H
(broadcast address).
Operational Description E1
0
RBC0
PEB 2254
(66)
11.96

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