PEB2254H-V14 Infineon Technologies, PEB2254H-V14 Datasheet - Page 24
PEB2254H-V14
Manufacturer Part Number
PEB2254H-V14
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEB2254H-V14.pdf
(313 pages)
Specifications of PEB2254H-V14
Operating Supply Voltage (typ)
5V
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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PEB 2254
General Features E1
Figure 5
NT - Application
1.6
Microprocessor Interface
The communication between the CPU and the FALC54 is done via a set of directly
accessible registers. The interface may be configured as Siemens/Intel or Motorola type
with a selectable data bus width of 8 or 16 bits.
The CPU transfers data to/from the FALC54 (via 64 byte deep FIFOs per direction and
channel), sets the operating modes, controls function sequences, and gets status
information by writing or reading control/status registers. All accesses can be done as
byte or word accesses if enabled. If 16-bit bus width is selected, access to lower/upper
part of the data bus is determined by address line A0 and signal BHE/BLE as shown in
table 1 and 2.
In table 3 is shown how the ALE (address latch enable) line is used to control the bus
structure and interface type. The switching of ALE allows the FALC54 to be directly
connected to a multiplexed address/data bus.
Semiconductor Group
24
11.96
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