PEB2254H-V14 Infineon Technologies, PEB2254H-V14 Datasheet - Page 249

• Manufacturer Part Number: PEB2254H-V14
• Manufacturer: Infineon Technologies

Specifications of PEB2254H-V14

• Operating Supply Voltage (typ): 5V
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

SSC1/0…
AUTO…
FM1…FM0…
Framer Mode Register 5 (Read/Write)
Value after RESET: 00
FMR5
EIBR…
Semiconductor Group
7
Select Sync Conditions
Loss of Frame Alignment (FRS0.LFA or opt. FRS0.LMFA) is declared
if
00 = 2 out of 4 framing bits
01 = 2 out of 5 framing bits
10 = 2 out of 6 framing bits in F4/12/72 format
10 = 2 out of 6 framing bits per multiframe period in ESF format
11 = reserved
are incorrect. It depends on the selected multiframe format and
optionally on bit FMR2.SSP which framing bits are observed:
F4:
F12, F72: SSP = 0: FT bits
ESF:
Enable Auto Resynchronization
0…
1…
Select Frame Mode
FM = 0: 12-frame multiframe format (F12, D3/4)
FM = 1: 4-frame multiframe format (F4)
FM = 2: 24-frame multiframe format (ESF)
FM = 3: 72-frame multiframe format (F72, remote switch mode)
Enable Internal Bit Robbing Access
0…
1…
EIBR
H
The receiver will not resynchronize automatically. Starting a
new synchronization procedure is possible via the bits:
FMR0.EXLS or FMR0.FRS.
Auto-resynchronization is enabled.
Normal operation.
A one in this bit position will cause the transmitter to send the
bit robbing signaling information stored in the XS1-12 (ESF)
resp. XS1-6 (F12/72) registers in the corresponding time slots.
XLD
FT bits
and FRS0.LMFA SSP = 1:FT
FS
ESF framing bits
FRS0.LMFA
XLU
FRS0.LFA
249
FRS0.LFA: FS bits
FRS0.LFA
Operational Description T1
FRS0.LFA
0
FRS0.LFA
PEB 2254
(1F)
11.96