PEB2254H-V14 Infineon Technologies, PEB2254H-V14 Datasheet - Page 18

• Manufacturer Part Number: PEB2254H-V14
• Manufacturer: Infineon Technologies

Specifications of PEB2254H-V14

• Operating Supply Voltage (typ): 5V
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

Pin Definitions and Function (cont’d)
Pin No.
70
68
59
65
64
63
62
Semiconductor Group
Symbol
DLR
XMFB
XSIGM
SYPR
SYPX
SCLKR
SCLKX
Input (I)
Output (O)
O
O
O
I
I
I
I
Function
Data Link Bit Receive
Marks the SA8-4 bits within the data stream on
RDO. The SA8-4 bit positions in time-slot 0 of
every frame not containing the frame alignment
signal are selected by register
XC0.SA8E-SA4E.
No function
Transmit Signaling Marker
Marks the transmit time-slots which are defined
by register TTR1-4 of every frame transmitted
via port XDI. In 4096 kbit/s mode XSIGM is
active only during the channel phase which is
selected by RC0.SICS.
Synchronous Pulse Receive
Defines the beginning of time-slot 0 at system
highway port RDO in conjunction with the
values of registers RC0.RCO, RC1.RTO and
RC0.RCOS. Sampling is done with the falling
edge of the SCLKR clock
Pulse Cycle: Integer multiple of 125 s.
Synchronous Pulse Transmit
Defines the beginning of time-slot 0 at system
highway port XDI in conjunction with the values
of registers XC0.XCO, XC1.XTO and
XC1.XCOS. Sampling is done with the falling
edge of the SCLKX clock. Pulse Cycle: Integer
multiple of 125 s.
System Clock Receive
Working clock for the FALC54 with a frequency
of 8192 kHz.
System Clock Transmit
Working clock for the FALC54 with a frequency
of 8192 kHz.
18
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General Features E1
PEB 2254
11.96