PEB2254H-V14 Infineon Technologies, PEB2254H-V14 Datasheet - Page 214
PEB2254H-V14
Manufacturer Part Number
PEB2254H-V14
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEB2254H-V14.pdf
(313 pages)
Specifications of PEB2254H-V14
Operating Supply Voltage (typ)
5V
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
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Byte sampling in BOM Mode
a)
b)
Two different BOM reception modes may be programmed (CCR1.BRM).
10 byte packets: After storing 10 bytes in RFIFO the receive status byte marking a BOM
frame (RSIS.HFR) is added as the eleventh byte and an interrupt (ISR0.RME) is
generated. The sampling of data bytes continues and interrupts are generated every 10
bytes until an HDLC flag is detected.
Continuous reception: Interrupts are generated every 32 (16, 4, 2) bytes. After
detecting an HDLC flag, byte sampling is stopped, the receive status byte is stored in
RFIFO and an RME interrupt is generated.
The user may switch between these modes at any time. Byte sampling may be stopped
by deactivating the BOM receiver (MODE.BRAC). In this case the receive status byte is
added, an interrupt is generated and HDLC-mode is entered. Whether the FALC54
operates in HDLC or BOM mode may be checked by reading the Signaling Status
Register (SIS.BOM).
Semiconductor Group
1111
1111
sync
sync
1111 1111 0011 0100 1111 1111 0011 0100 1110 1111 0011 0100 1101 1111
1111 0111 0110 1101 1111 0111 0110 1111 1111 0111 0110 0111 1111
not stored
1.byte
stored
corrupted
1.corrupted
sync
byte
new sync
General Functions and Device Architecture T1
stored
2.byte
214
1.byte
stored
2.sync
1.corrupted
sync
stored
3.byte
2.byte
stored
PEB 2254
3.corrupted
2.corrupted
sync
sync
11.96
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