PEB2254H-V14 Infineon Technologies, PEB2254H-V14 Datasheet - Page 242

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PEB2254H-V14

Manufacturer Part Number
PEB2254H-V14
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB2254H-V14

Operating Supply Voltage (typ)
5V
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Interrupt Mask Register 0…4
Value after RESET: FF
IMR0
IMR1
IMR2
IMR3
IMR4
IMR0...IMR4...
Framer Mode Register 0 (Read/Write)
Value after RESET: 00
FMR0
XC1…XC0…
Semiconductor Group
7
7
CASE
RME
FAR
XC1
LFA
ES
Interrupt Mask Register
Each interrupt source can generate an interrupt signal at port INT
(characteristics of the output stage are defined via register IPC). A ‘1’
in a bit position of IMR0…4 sets the mask active for the interrupt
status in ISR0…3. Masked interrupt statuses neither generate a
signal on INT, nor are they visible in register GIS. Moreover, they will
– not be displayed in the Interrupt Status Register if bit IPC.VIS is set
– be displayed in the Interrupt Status Register if bit IPC.VIS is set to
After RESET, all interrupts are disabled.
Transmit Code
Serial code transmitter is different programmable from the receiver.
00… NRZ (optical interface)
01… Not assigned
10… AMI coding with Zero Code Suppression (ZCS, B7 - Stuffing).
Disabling of the ZCS is done by activating the clear channel mode via
register CCB1-3. (ternary or digital interface)
11… B8ZS Code (ternary or digital dual rail interface)
RDO
RFS
SEC
FER
XC0
LFA
to ‘0’
‘1’.
H
H
, FF
MFAR
XSLP
ALLS
CER
RC1
H
ISF
, FF
H
, FF
LMFA
RMB
XDU
RC0
AIS
H
,FF
242
H
LLBSC
RSC
XMB
LOS
FRS
AIS
CRC6
SRAF
LOS
CVE
Operational Description T1
PDEN
XLSC
EXLS
RAR
SLIP
SLN
0
0
RPF
XPR
SLP
SIM
RA
PEB 2254
(1A)
(14)
(15)
(16)
(17)
(18)
11.96

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