PEB2254H-V14 Infineon Technologies, PEB2254H-V14 Datasheet - Page 250

• Manufacturer Part Number: PEB2254H-V14
• Manufacturer: Infineon Technologies

Specifications of PEB2254H-V14

• Operating Supply Voltage (typ): 5V
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

XLD…
XLU…
Transmit Control 0 (Read/Write)
Value after RESET: 00
XC0
BRM…
MFBS…
SFRZ…
XCO2…XCO0… Transmit Clock-Slot Offset
Semiconductor Group
7
BRM
Transmit LOOP Down Code
0…
1…
Transmit LOOP UP Code
0…
1…
Enable Bit Robbing Marker
A one in this bit will mark the robbed bit positions on the system
highway. RSIGM marks the receive and XSIGM marks the transmit
robbed bits. Only valid if robbed bit signaling is enabled
(FMR1.SIGM=1).
Enable pure Multiframe Begin Signals
Only valid if ESF or F72 format is selected.
If set, signals RMFB and XMFB indicate only the multiframe begin.
Additional pulses (every 12 frames) are disabled.
Select Freeze Output
0
1
Initial value loaded into the transmit bit counter at the trigger edge of
SCLKX when the synchronous pulse at port SYPXQ is active (see
figure 57).
MFBS
H
Normal operation.
A one in this bit position will cause the transmitter to replace
normal transmit data with the Loop Down Code: 001
continuously until this bit is reset. The Loop Down Code will be
overwritten by the framing/DL/CRC bits.
Normal operation.
A one in this bit position will cause the transmitter to replace
normal transmit data with the Loop UP Code ‘00001’
continuously until this bit is reset. The Loop UP Code will be
overwritten by the framing/DL/CRC bits.
Signal RFSP is output on port RFSP/FREEZE.
Freeze status signal will be output on port RFSP/FREEZE.
SFRZ
250
Operational Description T1
XCO2
0
XCO0
PEB 2254
(20)
11.96