PEB2254H-V14 Infineon Technologies, PEB2254H-V14 Datasheet - Page 34

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PEB2254H-V14

Manufacturer Part Number
PEB2254H-V14
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB2254H-V14

Operating Supply Voltage (typ)
5V
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Jitter Attenuator
Together with a PLL and a tunable crystal attenuation of received input jitter is done in
the clock- and data-recovery and either in the received elastic buffer (2 frames) or in the
jitter attenuator “JATT“ block of figure 3. The attenuator consists of a 288 Bit FIFO. The
FIFO is placed in the transmitter and will be active if bit LIM1.JATT=1 , Remote Loop or
Xslicer mode active.
The jitter attenuator meets the jitter transfer requirements of the Rec. I.431 and
G.735/736 (refer to figure 11).
Figure 11
Jitter Attenuation Performance
Also the requirements of ETSI TBR12/13 will be satisfied. Insuring adequate margin
against TBR12/13 output jitter limit with 15 UI input at 20 Hz the FALC54 will start jitter
attenuation at nearly 2 Hz.
Semiconductor Group
defines the number of pulses (1 to 255) to clear the LOS alarm. Additional recovery
conditions may be programmed by register LIM2.
General Functions and Device Architecture E1
34
PEB 2254
11.96

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