PEB2254H-V14 Infineon Technologies, PEB2254H-V14 Datasheet - Page 13

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PEB2254H-V14

Manufacturer Part Number
PEB2254H-V14
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB2254H-V14

Operating Supply Voltage (typ)
5V
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant
Pin Definitions and Function (cont’d)
Pin No.
3
4
5
6
7
9
10
Semiconductor Group
Symbol
REFR
RL2
RDIN
RCLKI
V
XTAL2
XTAL1
XTAL4
XTAL3
SSR
Input (I)
Output (O)
O
I
I
I
I
O
I
O
I
Function
Reference Resistance of 12K 1 %
connected to
Line Receiver 2
Analog Input from the external transformer.
Selected if LIM1.DRS = 0.
Receive Data Input Negative
Input for received dual rail PCM(-) route signal
which will be latched with the internal generated
Receive Route Clock. An internal DPLL will
extract the Receive Route Clock from the
incoming data pulse. The Duty cycle of the
receiving signal has to be closely to 50 %.
The dual rail mode is selected if LIM1.DRS = 1
and FMR0.RC1 = 1. Input sense is selected by
bit RC0.RDIS (after Reset: active low).
Receive Clock Input
Receive clock input for the optical interface if
LIM1.DRS = 1 and FMR0.RC1/0 = 00.
Clock frequency: 2048 kHz
Power Ground Supply for analog receiver
Crystal Connection 16.384 MHz
When an external clock is used, normally if the
bit LIM0.MAS is set, the FALC54 functions as a
master.
Crystal Connection 16.384 MHz
A crystal has only to be connected to these pins
to generate the transmit clock if XSLICER-
Mode (LIM1.JATT=1 and LIM1.RL=0) is
selected.
13
V
SS
General Features E1
PEB 2254
11.96

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