UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 136

8BIT MCU, 128K FLASH, 7K RAM, LQFP

UPD78F0890GK(A)-GAJ-AX

Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0890GK(A)-GAJ-AX

Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
(7) Oscillation stabilization time select register (OSTS)
136
This register is used to select the X1 clock oscillation stabilization wait time when the STOP mode is released.
The wait time set by OSTS is valid only after the STOP mode is released with the X1 clock selected as the CPU
clock.
selected as the CPU clock, the oscillation stabilization time must be confirmed by OSTC.
OSTS can be set by an 8-bit memory manipulation instruction.
Reset signal generation sets OSTS to 05H.
Address: FFA4H
Symbol
OSTS
After the STOP mode is released with the internal high-speed oscillation clock or subsystem clock
Remark f
Cautions 1. To set the STOP mode when the X1 clock is used as the CPU clock, set OSTS
Figure 6-8. Format of Oscillation Stabilization Time Select Register (OSTS)
OSTS2
7
0
0
0
0
1
1
After reset: 05H
Other than above
2. Do not change the value of the OSTS register during the X1 clock oscillation
3. If the STOP mode is entered and then released while the internal high-speed
4. The X1 clock oscillation stabilization wait time does not include the time until
X
: X1 clock oscillation frequency
before executing the STOP instruction.
stabilization time.
oscillation clock or subsystem clock is being used as the CPU clock, set the
oscillation stabilization time as follows.
The oscillation stabilization time counter counts up to the oscillation
stabilization time set by OSTS. Note, therefore, that only the status up to the
oscillation stabilization time set by OSTS is set to OSTC after STOP mode is
released.
clock oscillation starts (“a” below).
OSTS1
6
0
0
1
1
0
0
• Desired OSTC oscillation stabilization time ≤ Oscillation stabilization time
X1 pin voltage
waveform
set by OSTS
R/W
CHAPTER 6 CLOCK GENERATOR
OSTS0
User’s Manual U17554EJ4V0UD
5
0
1
0
1
0
1
STOP mode release
2
2
2
2
2
Setting prohibited
11
13
14
15
16
/f
/f
/f
/f
/f
X
X
X
X
X
4
0
a
Oscillation stabilization time selection
3
0
204.8
819.2
1.64 ms
3.27 ms
6.55 ms
f
X
μ
μ
= 10 MHz
OSTS2
s
s
2
OSTS1
102.4
409.6
819.2
1.64 ms
3.27 ms
1
f
X
μ
μ
μ
= 20 MHz
s
s
s
OSTS0
0

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