UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 542

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

Note When the CPU is operating on the subsystem clock and the internal high-speed oscillation clock has been
(Remark is listed on the next page.)
542
Item
System clock
CPU
Flash memory
RAM
Port (latch)
16-bit timer/event
counter
8-bit timer/event
counter
8-bit timer
Watch timer
Watchdog timer
Clock output
Buzzer output
A/D converter
Serial interface
CAN controller
Multiplier/divider
Power-on-clear function
Low-voltage detection function
External interrupt
Main system clock
Subsystem clock
f
RL
stopped, do not start operation of these functions on the external clock input from peripheral hardware pins.
HALT Mode Setting
UART60
UART61
CSI10
CSI11
f
f
f
f
f
00
01
02
03
50
51
H0
H1
RH
X
EXCLK
XT
EXCLKS
Note
Note
Note
Note
Note
Note
Note
Note
Clock supply to the CPU is stopped
Status before HALT mode was set is retained
Operates or stops by external clock input
Operation continues (cannot be stopped)
Operates or stops by external clock input
Status before HALT mode was set is retained
Operation stopped
Operation stopped
Status before HALT mode was set is retained
Status before HALT mode was set is retained
Operable
Operable. Clock supply to watchdog timer stops when “internal low-speed oscillator can be
stopped by software” is set by option byte.
Operable
Operable. However, operation disabled when peripheral hardware clock (f
Operable
Table 18-1. Operating Statuses in HALT Mode (2/2)
When CPU Is Operating on XT1 Clock (f
When HALT Instruction Is Executed While CPU Is Operating on Subsystem Clock
CHAPTER 18 STANDBY FUNCTION
User’s Manual U17554EJ4V0UD
XT
)
Status before HALT mode was set is retained
Operation continues (cannot be stopped)
When CPU Is Operating on External
Subsystem Clock (f
PRS
) is stopped.
EXCLKS
)