UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 452

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

452
(a) Read
(b) Write
(a) Read
(23) CAN message control register m (C0MCTRLm)
C0MCTRLm
C0MCTRLm
MUC
Note The MUC bit is undefined until the first reception and storage is performed.
Remark MOW bit is not set to 1 even if a remote frame is received and stored in the transmit
The C0MCTRLm register is used to control the operation of the message buffer.
MOW
After reset: 00x000000
IE
0
1
0
1
0
1
Note
The CAN module is not updating the message buffer (reception and storage).
The CAN module is updating the message buffer (reception and storage).
The message buffer is not overwritten by a newly received data frame.
The message buffer is overwritten by a newly received data frame.
Receive message buffer: Valid message reception completion interrupt disabled.
Transmit message buffer: Normal message transmission completion interrupt disabled.
Receive message buffer: Valid message reception completion interrupt enabled.
Transmit message buffer: Normal message transmission completion interrupt enabled.
message buffer with DN = 1.
00000000B
15
15
0
7
0
0
7
0
R/W
14
14
0
6
0
0
6
0
CHAPTER 16 CAN CONTROLLER
Message Buffer Interrupt Request Enable Bit
MUC
Address: See Table 16-16.
13
13
User’s Manual U17554EJ4V0UD
5
0
0
5
0
Message Buffer Overwrite Status Bit
Message Buffer Data Updating Bit
MOW
MOW
Clear
12
12
0
4
0
4
Clear
Set
11
11
IE
IE
IE
0
3
3
Clear
DN
DN
10
10
0
2
0
2
Clear
TRQ
TRQ
TRQ
Set
9
0
1
9
1
Clear
RDY
RDY
RDY
Set
8
0
0
8
0