UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 428

8BIT MCU, 128K FLASH, 7K RAM, LQFP

UPD78F0890GK(A)-GAJ-AX

Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0890GK(A)-GAJ-AX

Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
428
(a) Read
(b) Write
(a) Read
(6) CAN module control register (C0CTRL)
Remark - The RSTAT bit is set to 1 under the following conditions (timing).
After reset: 0000H
The C0CTRL register is used to control the operation mode of the CAN module.
RSTAT
C0CTRL
C0CTRL
0
1
- The RSTAT bit is cleared to 0 under the following conditions (timing)
Reception is stopped.
Reception is in progress.
- The SOF bit of a receive frame is detected
- On occurrence of arbitration loss during a transmit frame
- When a recessive level is detected at the second bit of the interframe space
- On transition to the initialization mode at the first bit of the interframe space
CCERC
CCERC
CCERC
Clear
Set
15
15
0
7
7
Clear
R/W
Set
AL
AL
AL
14
14
0
6
6
CHAPTER 16 CAN CONTROLLER
Address: FF90H, FF91H
VALID
VALID
Clear
13
13
User’s Manual U17554EJ4V0UD
0
5
0
5
PSMODE1 PSMODE0 OPMODE2 OPMODE1 OPMODE0
PSMODE1
PSMODE1
Reception Status Bit
Clear
Set
12
12
0
4
4
PSMODE0
PSMODE0
Clear
Set
11
11
0
3
3
OPMODE2
OPMODE2
Clear
Set
10
10
0
2
2
OPMODE1
OPMODE1
RSTAT
Clear
Set
9
1
9
1
OPMODE0
OPMODE0
TSTAT
Clear
Set
8
0
8
0

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