UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 206

8BIT MCU, 128K FLASH, 7K RAM, LQFP

UPD78F0890GK(A)-GAJ-AX

Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0890GK(A)-GAJ-AX

Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
7.4.4 External event counter operation
counter 0n (TM0n).
cleared to 0 and the interrupt request signal (INTTM00n) is generated.
prescaler mode register 0n (PRM0n).
TI00n pin is detected twice, thus eliminating noise with a short pulse width.
206
The basic operation setting procedure is as follows.
<1> Set the CRC0n register (see Figure 7-44 for the set value).
<2> Set the count clock by using the PRM0n register.
<3> Set any value to the CR00n register (0000H cannot be set).
<4> Set the TMC0n register to start the operation (see Figure 7-44 for the set value).
The external event counter counts the number of external clock pulses input to the TI00n pin using 16-bit timer
TM0n is incremented each time the valid edge specified by prescaler mode register 0n (PRM0n) is input.
When the TM0n count value matches the 16-bit timer capture/compare register 00n (CR00n) value, TM0n is
Input a value other than 0000H to CR00n (a count operation with 1-bit pulse cannot be carried out).
Any of three edges⎯rising, falling, or both edges⎯can be selected using bits 4 and 5 (ES0n0 and ES0n1) of
Sampling is performed using the internal clock (f
Setting
Remarks 1. For the setting of the TI00n pin, see 7.3 (5) Port mode register 0 (PM0) to (7) Port mode
2. For how to enable the INTTM00n interrupt, see CHAPTER 17 INTERRUPT FUNCTIONS.
register 13 (PM13).
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 TO 03
User’s Manual U17554EJ4V0UD
PRS
) and an operation is only performed when a valid level of the

Related parts for UPD78F0890GK(A)-GAJ-AX