UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 71
UPD78F0890GK(A)-GAJ-AX
Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0890GKA-GAJ-AX.pdf
(732 pages)
Specifications of UPD78F0890GK(A)-GAJ-AX
Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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3.4 Operand Address Addressing
during instruction execution.
3.4.1 Implied addressing
The following methods are available to specify the register and memory (addressing) to undergo manipulation
[Function]
[Operand format]
[Description example]
The register that functions as an accumulator (A and AX) among the general-purpose registers is automatically
(implicitly) addressed.
Of the 78K0/FE2 instruction words, the following instructions employ implied addressing.
Because implied addressing can be automatically employed with an instruction, no particular operand format is
necessary.
In the case of MULU X
With an 8-bit × 8-bit multiply instruction, the product of A register and X register is stored in AX. In this example,
the A and AX registers are specified by implied addressing.
MULU
DIVUW
ADJBA/ADJBS
ROR4/ROL4
Instruction
A register for multiplicand and AX register for product storage
AX register for dividend and quotient storage
A register for storage of numeric values that become decimal correction targets
A register for storage of digit data that undergoes digit rotation
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U17554EJ4V0UD
Register to Be Specified by Implied Addressing
71
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