UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 149

8BIT MCU, 128K FLASH, 7K RAM, LQFP

UPD78F0890GK(A)-GAJ-AX

Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0890GK(A)-GAJ-AX

Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
(3) Example of setting procedure when stopping the internal high-speed oscillation clock
<2> Selecting the clock supplied as the main system clock and peripheral hardware clock (MCM register)
<3> Selecting the CPU clock division ratio (PCC register)
The internal high-speed oscillation clock can be stopped in the following two ways.
• Executing the STOP instruction to set the STOP mode
• Setting RSTOP to 1 and stopping the internal high-speed oscillation clock
(a) To execute a STOP instruction
<1> Setting of peripheral hardware
<2> Setting the X1 clock oscillation stabilization time after standby release
<3> Executing the STOP instruction
Set the main system clock and peripheral hardware clock using XSEL and MCM0.
When CSS is cleared to 0, the main system clock is supplied to the CPU. To select the CPU clock
division ratio, use PCC0, PCC1, and PCC2.
Note The setting of <1> is not necessary when the internal high-speed oscillation clock or high-
XSEL
CSS
Stop peripheral hardware that cannot be used in the STOP mode (for peripheral hardware that
cannot be used in STOP mode, see CHAPTER 18 STANDBY FUNCTION).
When the CPU is operating on the X1 clock, set the value of the OSTS register before the STOP
instruction is executed.
When the STOP instruction is executed, the system is placed in the STOP mode and internal high-
speed oscillation clock is stopped.
0
0
1
0
speed system clock is already operating.
MCM0
PCC2
0
1
0
0
0
0
0
1
Other than above
Internal high-speed oscillation clock
(f
Selection of Main System Clock and Clock Supplied to Peripheral Hardware
RH
PCC1
)
CHAPTER 6 CLOCK GENERATOR
0
0
1
1
0
Main System Clock (f
User’s Manual U17554EJ4V0UD
PCC0
0
1
0
1
0
f
f
f
f
f
Setting prohibited
XP
XP
XP
XP
XP
XP
)
/2 (default)
/2
/2
/2
2
3
4
CPU Clock (f
Internal high-speed oscillation clock
(f
High-speed system clock (f
RH
Peripheral Hardware Clock (f
)
CPU
) Selection
XH
)
PRS
)
149

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