UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 575
UPD78F0890GK(A)-GAJ-AX
Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0890GKA-GAJ-AX.pdf
(732 pages)
Specifications of UPD78F0890GK(A)-GAJ-AX
Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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21.4 Cautions for Power-on-Clear Circuit
voltage (V
release of reset to the start of the operation of the microcontroller can be arbitrarily set by taking the following action.
<Action>
software counter that uses a timer, and then initialize the ports.
• If supply voltage fluctuation is 50 ms or less in vicinity of POC detection voltage
Note 1
In a system where the supply voltage (V
After releasing the reset signal, wait for the supply voltage fluctuation period of each system by means of a
Notes 1.
POC
2.
), the system may be repeatedly reset and released from the reset status. In this case, the time from
If reset is generated again during this period, initialization processing <2> is not started.
A flowchart is shown on the next page.
No
Figure 21-3. Example of Software Processing After Reset Release (1/2)
Setting 8-bit timer H1
(to measure 50 ms)
50 ms has passed?
processing <1>
processing <2>
(TMIFH1 = 1?)
Clearing WDT
Initialization
Initialization
Reset
Yes
Power-on-clear
CHAPTER 21 POWER-ON-CLEAR CIRCUIT
DD
User’s Manual U17554EJ4V0UD
) fluctuates for a certain period in the vicinity of the POC detection
;
; f
; Setting of division ratio of system clock,
Check the reset source
Initialize the port.
Source: f
Timer starts (TMHE1 = 1).
such as setting of timer or A/D converter
PRS
= Internal high-speed oscillation clock (8.4 MHz (MAX.)) (default)
where comparison value = 102:
PRS
(8.4 MHz (MAX.))/2
Note 2
12
,
50 ms
575
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