UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 142

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

142
Subsystem clock (f
(when XT1 oscillation
oscillation clock (f
(when X1 oscillation
Internal high-speed
Internal reset signal
Notes 1.
system clock (f
<1> The internal reset signal by the power-on clear (POC) circuit is generated after a power supply injection.
<2> If power supply voltage exceeds 1.59 V (TYP.), reset will be released and the oscillation start of the high-
<3> If power supply voltage is rose by inclination of 0.5 V/ms (MAX.), after the voltage stable waiting time of a
<4> One clock or XT1 clock should set up an oscillation start by software (see (1) in 6.6.1 Controlling high-
<5> When you change CPU to X1 clock or XT1 clock, set up a change by software after the oscillation stability
Power supply
voltage (V
High-speed
CPU clock
speed oscillator will be carried out automatically.
power supply/regulator passed after reset release and reset processing will be performed, CPU carries out a
start of operation with high-speed oscillation clock .
speed system clock and (1) in 6.6.3 Example of controlling subsystem clock).
waiting of a clock (see (3) in 6.6.1 Controlling high-speed system clock and (3) in 6.6.3 Example of
controlling subsystem clock).
selected)
selected)
2.
Figure 6-12 Operation of the clock generating circuit when power supply voltage injection
DD
SUB
0 V
RH
XH
high-speed oscillation clock.
When releasing a reset (above figure) or releasing STOP mode while the CPU is operating on the
internal high-speed oscillation clock, confirm the oscillation stabilization time for the X1 clock using the
oscillation stabilization time counter status register (OSTC). If the CPU operates on the high-speed
)
The internal voltage stabilization time includes the oscillation accuracy stabilization time of the internal
system clock (X1 oscillation), set the oscillation stabilization time when releasing STOP mode using the
oscillation stabilization time select register (OSTS).
)
)
)
<1>
1.59 V
(TYP.)
(When 1.59 V POC mode setup (option byte: LVISTART = 0))
<3> Waiting for
voltage stabilization
<2>
0.5 V/ms
(1.93 to 5.39 ms)
(MIN.)
Note 1
1.8 V
Starting X1 oscillation
is set by software.
CHAPTER 6 CLOCK GENERATOR
User’s Manual U17554EJ4V0UD
Starting XT1 oscillation
is set by software.
Internal high-speed oscillation clock
Reset processing
<4>
(11 to 45 s)
oscillation stabilization time:
<4>
2
11
/f
X
X1 clock
to 2
16
/f
X
Note 2
<5>
High-speed system clock
Switched by
software
<5>
Subsystem clock