UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 303

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

13.6 Cautions for A/D Converter
(1) Operating current in STOP mode
(2) Input range of ANI0 to ANI11
(3) Conflicting operations
(4) Noise countermeasures
The A/D converter stops operating in the STOP mode. At this time, the operating current can be reduced by
clearing bit 7 (ADCS) and bit 0 (ADCE) of the A/D converter mode register (ADM) to 0.
To restart from the standby status, clear bit 6 (ADIF) of interrupt request flag register 1L (IF1L) to 0 and start
operation.
Observe the rated range of the ANI0 to ANI11 input voltage. If a voltage of AV
(even in the range of absolute maximum ratings) is input to an analog input channel, the converted value of that
channel becomes undefined. In addition, the converted values of the other channels may also be affected.
<1> Conflict between A/D conversion result register (ADCR, ADCRH) write and ADCR or ADCRH read by
<2> Conflict between ADCR or ADCRH write and A/D converter mode register (ADM) write, analog input
To maintain the 10-bit resolution, attention must be paid to noise input to the AV
<1> Connect a capacitor with a low equivalent resistance and a good frequency response to the power supply.
<2> The higher the output impedance of the analog input source, the greater the influence. To reduce the
<3> Do not switch these pins with other pins during conversion.
<4> The accuracy is improved if the HALT mode is set immediately after the start of conversion.
instruction upon the end of conversion
ADCR or ADCRH read has priority. After the read operation, the new conversion result is written to ADCR
or ADCRH.
channel specification register (ADS), or A/D port configuration register (ADPC) write upon the end of
conversion
ADM, ADS, or ADPC write has priority. ADCR or ADCRH write is not performed, nor is the conversion end
interrupt signal (INTAD) generated.
noise, connecting external C as shown in Figure 13-21 is recommended.
CHAPTER 13 A/D CONVERTER
User’s Manual U17554EJ4V0UD
REF
REF
pin and pins ANI0 to ANI11.
or higher and AV
SS
or lower
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