UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 511

8BIT MCU, 128K FLASH, 7K RAM, LQFP

UPD78F0890GK(A)-GAJ-AX

Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0890GK(A)-GAJ-AX

Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
Note Clear all TRQ bits when re-initialization of message buffer is executed by clearing RDY bit before bus-off
Caution When the transmission from the initialization mode to any operation modes is requested to
Remark OPMODE: Normal operation mode, normal operation mode with ABT, receive-only mode, single-shot
recovery sequence is started.
execute bus-off recovery sequence again in the bus-off recovery sequence, reception error
counter is cleared.
Therefore it is necessary to detect 11 consecutive recessive-level bits 128 times on the bus
again.
Figure 16-56. Bus-Off Recovery (Expect Normal Operation Mode with ABT)
No
mode, self-test mode
Forced recovery from bus off?
Access to registers other than
C0CTRL and C0GMCTRL
Set C0CTRL register
Set C0CTRL register
(Clear OPMODE)
Clear all TRQ bits
(Set OPMODE)
Set CCERC bit
Yes
BOFF = 1?
registers
START
END
CHAPTER 16 CAN CONTROLLER
Yes
User’s Manual U17554EJ4V0UD
Note
No
Set C0CTRL register
Wait for recovery
from bus off
(Set OPMODE)
511

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