UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 561

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

19.1 Register for Confirming Reset Source
store which source has generated the reset request.
Many internal reset generation sources exist in the 78K0/FE2. The reset control flag register (RESF) is used to
RESF can be read by an 8-bit memory manipulation instruction.
RESET input, reset input by power-on-clear (POC) circuit, and reading RESF clear RESF to 00H.
The status of RESF when a reset request is generated is shown in Table 19-3.
Address: FFACH
Symbol
RESF
Note The value after reset varies depending on the reset source.
Caution Do not read data by a 1-bit memory manipulation instruction.
Flag
WDTRF
LVIRF
WDTRF
LVIRF
7
0
0
1
0
1
After reset: 00H
Reset Source
Table 19-3. RESF Status When Reset Request Is Generated
Figure 19-5. Format of Reset Control Flag Register (RESF)
Internal reset request is not generated, or RESF is cleared.
Internal reset request is generated.
Internal reset request is not generated, or RESF is cleared.
Internal reset request is generated.
6
0
Note
Cleared (0)
RESET Input
CHAPTER 19 RESET FUNCTION
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User’s Manual U17554EJ4V0UD
5
0
Internal reset request by low-voltage detector (LVI)
Internal reset request by watchdog timer (WDT)
WDTRF
Cleared (0)
Reset by POC
4
3
0
Set (1)
Held
Reset by WDT
2
0
Held
Set (1)
Reset by LVI
1
0
LVIRF
0
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