UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 423

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

(a) Read
(b) Write
(a) Read
(3) CAN global automatic block transmission control register (C0GMABT)
The C0GMABT register is used to control the automatic block transmission (ABT) operation.
After reset: 0000H
Caution Before changing the normal operation mode with ABT to the initialization mode,
C0GMABT
C0GMABT
ABTCLR
ABTTRG
Remarks 1. Set the ABTCLR bit to 1 while the ABTTRG bit is cleared (0).
Caution Do not set the ABTTRG bit (ABTTRG = 1) in the initialization mode. If the
0
1
0
1
be sure to set the C0GMABT register to the default value (0000H).
2. When the automatic block transmission engine is cleared by setting the ABTCLR bit
ABTTRG bit is set in the initialization mode, the operation is not guaranteed
after the CAN module has entered the normal operation mode with ABT.
Clearing the automatic transmission engine is completed.
The automatic transmission engine is being cleared.
Automatic block transmission is stopped.
Automatic block transmission is under execution.
The operation is not guaranteed if the ABTCLR bit is set to 1 while the ABTTRG bit
is set to 1.
to 1, the ABTCLR bit is automatically cleared to 0 as soon as the requested
clearing processing is complete.
15
15
0
7
0
0
7
0
R/W
14
14
0
6
0
0
6
0
Automatic Block Transmission Engine Clear Status Bit
CHAPTER 16 CAN CONTROLLER
Address: FF66H, FF67H
Automatic Block Transmission Status Bit
13
13
User’s Manual U17554EJ4V0UD
0
5
0
0
5
0
12
12
0
4
0
0
4
0
11
11
0
3
0
0
3
0
10
10
0
2
0
0
2
0
ABTCLR ABTTRG
ABTCLR
Set
9
0
1
9
1
0
ABTTRG
ABTTRG
Clear
Set
8
0
0
8
0
423