UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 225

8BIT MCU, 128K FLASH, 7K RAM, LQFP

UPD78F0890GK(A)-GAJ-AX

Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0890GK(A)-GAJ-AX

Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
(2) 8-bit timer compare register 5n (CR5n)
CR5n can be read and written by an 8-bit memory manipulation instruction.
Except in PWM mode, the value set in CR5n is constantly compared with the 8-bit timer counter 5n (TM5n) count
value, and an interrupt request (INTTM5n) is generated if they match.
In PWM mode, when the TO5n pin becomes active due to a TM5n overflow and the values of TM5n and CR5n
match, the TO5n pin becomes inactive.
The value of CR5n can be set within 00H to FFH.
Reset signal generation clears CR5n to 00H.
Cautions 1. In the mode in which clear & start occurs on a match of TM5n and CR5n (TMC5n6 = 0), do
Remark n = 0, 1
Address: FF17H (CR50), FF41H (CR51)
(n = 0, 1)
Symbol
2. In PWM mode, make the CR5n rewrite period 3 count clocks of the count clock (clock
CR5n
not write other values to CR5n during operation.
selected by TCL5n) or more.
Figure 8-4. Format of 8-Bit Timer Compare Register 5n (CR5n)
CHAPTER 8 8-BIT TIMER/EVENT COUNTERS 50 AND 51
User’s Manual U17554EJ4V0UD
After reset: 00H
R/W
225

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