UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 9

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

CHAPTER 4 MEMORY BANK SELECT FUNCTION (
CHAPTER 5 PORT FUNCTIONS........................................................................................................... 91
CHAPTER 6 CLOCK GENERATOR .................................................................................................... 125
3.4 Operand Address Addressing .................................................................................................... 71
4.1 Memory Bank................................................................................................................................ 80
4.2 Difference in Representation of Memory Space ....................................................................... 81
4.3 Memory Bank Select Register (BANK)....................................................................................... 82
4.4 Selecting Memory Bank............................................................................................................... 83
5.1 Port Functions .............................................................................................................................. 91
5.2 Port Configuration ....................................................................................................................... 92
5.3 Registers Controlling Port Function ........................................................................................ 116
5.4 Port Function Operations.......................................................................................................... 123
5.5 Cautions on 1-Bit Manipulation Instruction for Port Register n (Pn).................................... 124
6.1 Functions of Clock Generator................................................................................................... 125
3.3.1 Relative addressing............................................................................................................................68
3.3.2 Immediate addressing........................................................................................................................69
3.3.3 Table indirect addressing ...................................................................................................................70
3.3.4 Register addressing ...........................................................................................................................70
3.4.1 Implied addressing .............................................................................................................................71
3.4.2 Register addressing ...........................................................................................................................72
3.4.3 Direct addressing ...............................................................................................................................73
3.4.4 Short direct addressing ......................................................................................................................74
3.4.5 Special function register (SFR) addressing........................................................................................75
3.4.6 Register indirect addressing...............................................................................................................76
3.4.7 Based addressing ..............................................................................................................................77
3.4.8 Based indexed addressing.................................................................................................................78
3.4.9 Stack addressing................................................................................................................................79
4.4.1 Referencing values between memory banks .....................................................................................83
4.4.2 Branching instruction between memory banks...................................................................................85
4.4.3 Subroutine call between memory banks ............................................................................................87
4.4.4 Instruction branch to bank area by interrupt.......................................................................................89
5.2.1 Port 0 .................................................................................................................................................93
5.2.2 Port 1 .................................................................................................................................................95
5.2.3 Port 3 .................................................................................................................................................98
5.2.4 Port 4 ...............................................................................................................................................100
5.2.5 Port 5 ...............................................................................................................................................101
5.2.6 Port 6 ...............................................................................................................................................102
5.2.7 Port 7 ...............................................................................................................................................103
5.2.8 Port 8 ...............................................................................................................................................108
5.2.9 Port 9 ...............................................................................................................................................109
5.2.10 Port 12 ...........................................................................................................................................110
5.2.11 Port 13 ...........................................................................................................................................113
5.4.1 Writing to I/O port .............................................................................................................................123
5.4.2 Reading from I/O port.......................................................................................................................123
5.4.3 Operations on I/O port......................................................................................................................123
User’s Manual U17554EJ4V0UD
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PD78F0889, 78F0890 ONLY) .................. 80
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