UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 556

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

556
(when X1 oscillation is selected)
Note Set P130 to high-level output by software.
Remarks 1. When reset is effected, P130 outputs a low level. If P130 is set to output a high level before reset is
High-speed system clock
Internal reset signal
Internal high-speed
oscillation clock
(except P130)
2. For the reset timing of the power-on-clear circuit and low-voltage detector, see CHAPTER 21
CPU clock
effected, the output signal of P130 can be dummy-output as the CPU reset signal.
POWER-ON-CLEAR CIRCUIT and CHAPTER 22 LOW-VOLTAGE DETECTOR.
RESET
Port pin
Port pin
(P130)
Figure 19-4. Timing of Reset in STOP Mode by RESET Input
operation
Normal
STOP instruction execution
CHAPTER 19 RESET FUNCTION
(oscillation stop)
Stop status
User’s Manual U17554EJ4V0UD
Delay
(oscillation stop)
Reset period
(5 s (TYP.))
Delay
accuracy stabilization
Wait for oscillation
(86 to 361 s)
(11 to 45 s)
processing
Reset
Hi-Z
Starting X1 oscillation is specified by software.
Normal operation
(internal high-speed oscillation clock)
Note