UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 539
UPD78F0890GK(A)-GAJ-AX
Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0890GKA-GAJ-AX.pdf
(732 pages)
Specifications of UPD78F0890GK(A)-GAJ-AX
Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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(2) Oscillation stabilization time select register (OSTS)
This register is used to select the X1 clock oscillation stabilization time when the STOP mode is released. When
the X1 clock is selected as the CPU clock, the operation waits for the time set using OSTS after the STOP mode
is released.
When the internal high-speed oscillation clock is selected as the CPU clock, confirm with OSTC that the desired
oscillation stabilization time has elapsed after the STOP mode is released. The oscillation stabilization time can
be checked up to the time set using OSTC.
OSTS can be set by an 8-bit memory manipulation instruction.
Reset signal generation sets OSTS to 05H.
Address: FFA4H
Symbol
OSTS
Cautions 1. To set the STOP mode when the X1 clock is used as the CPU clock, set OSTS before
Remark
Figure 18-2. Format of Oscillation Stabilization Time Select Register (OSTS)
OSTS2
2. Do not change the value of the OSTS register during the X1 clock oscillation
3. The oscillation stabilization time counter counts up to the oscillation stabilization time
4. The X1 clock oscillation stabilization time does not include the time until clock
f
0
0
0
1
1
X
7
0
: X1 clock oscillation frequency
Other than above
After reset: 05H
executing the STOP instruction.
stabilization time.
set by OSTS. If the STOP mode is entered and then released while the internal high-
speed oscillation clock is being used as the CPU clock, set the oscillation stabilization
time as follows.
Note, therefore, that only the status up to the oscillation stabilization time set by OSTS
is set to OSTC after STOP mode is released.
oscillation starts (“a” below).
• Desired OSTC oscillation stabilization time ≤ Oscillation stabilization time set by
OSTS1
OSTS
0
1
1
0
0
6
0
OSTS0
X1 pin voltage
waveform
1
0
1
0
1
CHAPTER 18 STANDBY FUNCTION
R/W
User’s Manual U17554EJ4V0UD
5
0
2
2
2
2
2
Setting prohibited
STOP mode release
11
13
14
15
16
/f
/f
/f
/f
/f
X
X
X
X
X
512
2.05 ms min.
4.10 ms min.
8.19 ms min.
16.38 ms min. 13.11 ms min. 6.55 ms
4
0
a
f
X
= 4 MHz
μ
s min.
Oscillation stabilization time selection
3
0
409.6
1.64 ms min.
3.27 ms min.
6.55 ms min.
f
X
= 5 MHz
μ
s min.
OSTS2
2
204.8
819.2
1.64 ms
3.27 ms
f
X
= 10 MHz
μ
μ
OSTS1
s
s
1
102.4
409.6
819.2
1.64 ms
3.27 ms
f
X
= 20 MHz
OSTS0
μ
μ
μ
0
s
s
s
539
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