UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 249

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

9.4 Operation of 8-Bit Timers H0 and H1
9.4.1 Operation as interval timer/square-wave output
generated and 8-bit timer counter Hn is cleared to 00H.
CMP1n register is not detected even if the CMP1n register is set, timer output is not affected.
is output from TOHn.
(1) Usage
When 8-bit timer counter Hn and compare register 0n (CMP0n) match, an interrupt request signal (INTTMHn) is
Compare register 1n (CMP1n) is not used in interval timer mode. Since a match of 8-bit timer counter Hn and the
By setting bit 0 (TOENn) of timer H mode register n (TMHMDn) to 1, a square wave of any frequency (duty = 50%)
Generates the INTTMHn signal repeatedly at the same interval.
<1> Set each register.
<2> Count operation starts when TMHEn = 1.
<3> When the values of 8-bit timer counter Hn and the CMP0n register match, the INTTMHn signal is generated
<4> Subsequently, the INTTMHn signal is generated at the same interval. To stop the count operation, clear
TMHMDn
Remark n = 0, 1
(i)
(ii) CMP0n register setting
and 8-bit timer counter Hn is cleared to 00H.
TMHEn to 0.
TMHEn
Setting timer H mode register n (TMHMDn)
• Compare value (N)
Figure 9-9. Register Setting During Interval Timer/Square-Wave Output Operation
0
CKSn2
0/1
Interval time = (N +1)/f
CKSn1
0/1
CHAPTER 9 8-BIT TIMERS H0 AND H1
CKSn0
0/1
User’s Manual U17554EJ4V0UD
TMMDn1
0
CNT
TMMDn0 TOLEVn
0
0/1
TOENn
0/1
Timer output setting
Timer output level inversion setting
Interval timer mode setting
Count clock (f
Count operation stopped
CNT
) selection
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