UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 430

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

430
(b)Write
OPMODE2 OPMODE1 OPMODE0
PSMODE1 PSMODE0
Cautions 1. Transition to and from the CAN stop mode must be made via CAN sleep mode.
Caution Transit to initialization mode or power saving modes may take some time. Be sure
Remark The OPMODE[2:0] bits are read-only in the CAN sleep mode or CAN stop mode.
Set CCERC
Other than
0
0
0
0
1
1
0
0
1
1
Set AL
above
1
0
1
Other than above
Other than above
2. The MBON flag of C0GMCTRL must be checked after releasing a power save
3. CAN Sleep mode requests are kept pending, until cancelled by software or
to verify the success of mode change by reading the values, before proceeding.
A request for direct transition to and from the CAN stop mode is ignored.
mode, prior to access the message buffers again.
entered on appropriate bus condition (bus idle). Software can check the actual
status by reading PSMODE.
0
1
0
1
0
0
1
1
0
0
Clear CCERC
Clear AL
No power save mode is selected.
CAN sleep mode
Setting prohibited
CAN stop mode
1
0
1
0
0
1
0
1
0
1
No operation mode is selected (CAN module is in the initialization mode).
Normal operation mode
Normal operation mode with automatic block transmission function
(normal operation mode with ABT)
Receive-only mode
Single-shot mode
Self-test mode
Setting prohibited
AL bit is cleared to 0.
AL bit is set to 1.
AL bit is not changed.
CCERC bit is set to 1.
CCERC bit is not changed.
CHAPTER 16 CAN CONTROLLER
User’s Manual U17554EJ4V0UD
Power Save Mode
Setting of CCERC Bit
Operation Mode
Setting of AL Bit