UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 541
UPD78F0890GK(A)-GAJ-AX
Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0890GKA-GAJ-AX.pdf
(732 pages)
Specifications of UPD78F0890GK(A)-GAJ-AX
Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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Remark f
Item
System clock
CPU
Flash memory
RAM
Port (latch)
16-bit timer/event
counter
8-bit timer/event
counter
8-bit timer
Watch timer
Watchdog timer
Clock output
Buzzer output
A/D converter
Serial interface
CAN controller
Multiplier/divider
Power-on-clear function
Low-voltage detection function
External interrupt
Main system clock
Subsystem clock
f
RL
f
f
f
f
f
RH
X
EXCLK
XT
EXCLKS
RL
HALT Mode Setting
:
:
:
:
:
: External subsystem clock
UART60
UART61
CSI10
CSI11
Internal high-speed oscillation clock
X1 clock
External main system clock
XT1 clock
Internal low-speed oscillation clock
f
f
f
f
f
00
01
02
03
50
51
H0
H1
RH
X
EXCLK
XT
EXCLKS
Clock supply to the CPU is stopped
Operation continues (cannot
be stopped)
Status before HALT mode
was set is retained
Operates or stops by external clock input
Status before HALT mode was set is retained
Operates or stops by external clock input
Status before HALT mode was set is retained
Operation stopped
Operation stopped
Status before HALT mode was set is retained
Status before HALT mode was set is retained
Operable
Operable. Clock supply to watchdog timer stops when “internal low-speed oscillator can be
stopped by software” is set by option byte.
Operable
Table 18-1. Operating Statuses in HALT Mode (1/2)
When CPU Is Operating on
Oscillation Clock (f
Internal High-Speed
When HALT Instruction Is Executed While CPU Is Operating on Main System Clock
CHAPTER 18 STANDBY FUNCTION
User’s Manual U17554EJ4V0UD
RH
)
Status before HALT mode was set is retained
Operation continues (cannot
be stopped)
When CPU Is Operating on
X1 Clock (f
X
)
Status before HALT mode
was set is retained
Operation continues (cannot
be stopped)
External Main System Clock
When CPU Is Operating on
(f
EXCLK
)
541
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