UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 391

8BIT MCU, 128K FLASH, 7K RAM, LQFP

UPD78F0890GK(A)-GAJ-AX

Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0890GK(A)-GAJ-AX

Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
16.2.5 Overload frame
An overload frame is transmitted under the following conditions.
- When the receiving node has not completed the reception operation
- If a dominant level is detected at the first two bits during intermission
- If a dominant level is detected at the last bit (7th bit) of the end of frame or at the last bit (8th bit) of the error
delimiter/overload delimiter
Note The CAN is internally fast enough to process all received frames not generating overload frames.
Remark
<1>
<2>
<3>
<4>
<5>
No
Overload flag
Overload flag from other node
Overload delimiter
Frame
Interframe space/overload
frame
D: Dominant = 0
R: Recessive = 1
R
D
(<4>)
Name
6 bits
<1>
Table 16-8. Definition of Overload Frame Fields
Overload frame
0 to 6 bits
CHAPTER 16 CAN CONTROLLER
Figure 16-16. Overload Frame
<2>
Bit Count
User’s Manual U17554EJ4V0UD
0 to 6
8
6
8 bits
<3>
Outputs 6 dominant-level bits consecutively.
The node that received an overload flag in the interframe
space outputs an overload flag.
Outputs 8 recessive-level bits consecutively.
If a dominant level is detected at the 8th bit, an overload frame
is transmitted from the next bit.
Output following an end of frame, error delimiter, or overload
delimiter.
An interframe space or overload frame starts from here.
(<5>)
Interframe space or overload frame
Overload delimiter
Overload flag
Overload flag
Frame
Note
Definition
391

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