UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 34

8BIT MCU, 128K FLASH, 7K RAM, LQFP

UPD78F0890GK(A)-GAJ-AX

Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet

Specifications of UPD78F0890GK(A)-GAJ-AX

Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
2.2.8 P80 to P87 (port 8)
(1)
(2)
2.2.9 P90 to P93 (port 9)
(1)
(2)
2.2.10 P120 to P124 (port 12)
external clock input for main system clock, external clock input for subsystem clock and potential input for external
low-voltage detection. The following operation modes can be specified in 1-bit units.
(1)
(2)
34
P80 to P87 function as an 8-bit I/O port. These pins also function as pins for A/D converter analog input.
The following operation modes can be specified in 1-bit units.
P90 to P93 function as an 4-bit I/O port. These pins also function as pins for A/D converter analog input.
The following operation modes can be specified in 1-bit units.
P120 to P124 function as a 5-bit I/O port. These pins also function as pins for external interrupt request input,
P80 to P87 function as an 8-bit I/O port. P80 to P87 can be set to input or output in 1-bit units using port mode
register 8 (PM8).
P80 to P87 function as A/D converter analog input pins (ANI0 to ANI7). When using these pins as analog input
pins, see (5) P80/ANI0 to P87/ANI7, P90/ANI8 to P93/ANI11 in 13.6 Cautions for A/D Converter.
P90 to P93 function as an 4-bit I/O port. P90 to P93 can be set to input or output in 1-bit units using port mode
register 9 (PM9).
P90 to P93 function as A/D converter analog input pins (ANI8 to ANI11). When using these pins as analog input
pins, see (5) P80/ANI0 to P87/ANI7, P90/ANI8 to P93/ANI11 in 13.6 Cautions for A/D Converter.
P120 to P124 function as a 5-bit I/O port. P120 to P124 can be set to input or output using port mode register 12
(PM12). Only for P120, use of an on-chip pull-up resistor can be specified by pull-up resistor option register 12
(PU12).
P120 to P124 function as pins for external interrupt request input, potential input for external low-voltage
detection, resonator connection for main system clock, resonator connection for subsystem clock, external clock
input for main system clock and external clock input for subsystem clock.
(a) INTP0
Port mode
Control mode
Port mode
Control mode
Port mode
Control mode
Caution P80/ANI0 to P87/ANI7 is set in the analog input mode after release of reset.
Caution P90/ANI8 to P93/ANI11 is set in the analog input mode after release of reset.
This functions as an external interrupt request input for which the valid edge (rising edge, falling edge, or
both rising and falling edges) can be specified.
CHAPTER 2 PIN FUNCTIONS
User’s Manual U17554EJ4V0UD

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