UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 528

• Manufacturer Part Number: UPD78F0890GK(A)-GAJ-AX
• Description: 8BIT MCU, 128K FLASH, 7K RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0890GK(A)-GAJ-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 10
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

(4) External interrupt rising edge enable register (EGP), external interrupt falling edge enable register (EGN)
Address: FF48H
Symbol
EGP
Address: FF49H
Symbol
EGN
528
These registers specify the valid edge for INTP0 to INTP7.
EGP and EGN are set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears these registers to 00H.
Table 17-3 shows the ports corresponding to EGPn and EGNn.
Caution Select the port mode by clearing EGPn and EGNn to 0 because an edge
Remark n = 0 to 7
EGP7
EGN7
EGPn
Detection Enable Register
7
7
0
0
1
1
After reset: 00H
After reset: 00H
Figure 17-5. Format of External Interrupt Rising Edge Enable Register (EGP)
EGP0
EGP1
EGP2
EGP3
EGP4
EGP5
EGP6
EGP7
may be detected when the external interrupt function is switched to the
port function.
EGN6
EGNn
EPG6
6
6
0
1
0
1
Table 17-3. Ports Corresponding to EGPn and EGNn
and External Interrupt Falling Edge Enable Register (EGN)
EGN0
EGN1
EGN2
EGN3
EGN4
EGN5
EGN6
EGN7
R/W
R/W
Edge detection disabled
Falling edge
Rising edge
Both rising and falling edges
EGN5
CHAPTER 17 INTERRUPT FUNCTIONS
EGP5
5
5
P120
P30
P31
P32
P33
P16
P72
P73
User’s Manual U17554EJ4V0UD
Edge Detection Port
EGN4
EGP4
INTPn pin valid edge selection (n = 0 to 7)
4
4
EGN3
EGP3
3
3
INTP0
INTP1
INTP2
INTP3
INTP4
INTP5
INTP6
INTP7
EGN2
EGP2
2
2
External Request Signal
EGN1
EGP1
1
1
EGP0
EGN0
0
0