UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 380
UPD78F0890GK(A)-GAJ-AX
Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0890GKA-GAJ-AX.pdf
(732 pages)
Specifications of UPD78F0890GK(A)-GAJ-AX
Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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16.1.3 Configuration
380
Interrupt request
INTWUP0
INTREC0
INTERR0
INTTRX0
The CAN controller is composed of the following four blocks.
(1) NPB interface
(2) MAC (Memory Access Controller)
(3) CAN protocol layer
(4) CAN RAM
This functional block provides an NPB (NEC peripheral I/O bus) interface and means of transmitting and
receiving signals between the CAN module and the host CPU.
This functional block controls access to the CAN protocol layer and to the CAN RAM within the CAN module.
This functional block is involved in the operation of the CAN protocol and its related settings.
This is the CAN memory functional block, which is used to store message IDs, message data, etc.
interface
CPU
NPB
(Message Control Module)
Message
Figure 16-1. Block Diagram of CAN Module
buffer 0
Message
buffer 1
Message
buffer 2
Message
Message
buffer 15
CAN module
buffer 3
CAN RAM
(NEC Peripheral I/O Bus)
CHAPTER 16 CAN CONTROLLER
MCM
User’s Manual U17554EJ4V0UD
NPB
C0MASK1
C0MASK2
C0MASK3
C0MASK4
Protocol
Layer
CAN
CTxD
CRxD
transceiver
CAN
CAN_H0
CAN_L0
CAN bus
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