UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 352
UPD78F0890GK(A)-GAJ-AX
Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0890GKA-GAJ-AX.pdf
(732 pages)
Specifications of UPD78F0890GK(A)-GAJ-AX
Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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(2) Generation of serial clock
352
A serial clock can be generated by using clock selection register 6n (CKSR6n) and baud rate generator control
register 6n (BRGC6n).
Select the clock to be input to the 8-bit counter by using bits 3 to 0 (TPS63n to TPS60n) of CKSR6n.
Bits 7 to 0 (MDL67n to MDL60n) of BRGC6n can be used to select the division value of the 8-bit counter.
(a) Baud rate
(b) Error of baud rate
Remark POWER6n: Bit 7 of asynchronous serial interface operation mode register 6n (ASIM6n)
The baud rate can be calculated by the following expression.
• Baud rate =
f
k:
The baud rate error can be calculated by the following expression.
• Error (%) =
XCLK6
event counter
: Frequency of base clock selected by TPS63n to TPS60n bits of CKSR6n register
8-bit timer/
Value set by MDL67n to MDL60n bits of BRGC6n register (k = 4, 5, 6, ..., 255)
50 output
f
PRS
f
f
f
f
f
f
f
f
PRS
PRS
PRS
PRS
PRS
PRS
PRS
PRS
TXE6n:
RXE6n:
CKSR6n:
BRGC6n:
n = 0, 1
f
PRS
f
/2
PRS
/2
/2
/2
/2
/2
/2
/2
/2
f
/2
10
2 × k
XCLK6
Actual baud rate (baud rate with error)
2
3
4
5
6
7
8
9
CKSR6n: TPS63n to TPS60n
Desired baud rate (correct baud rate)
CHAPTER 14 SERIAL INTERFACES UART60 AND UART61
[bps]
Figure 14-32. Configuration of Baud Rate Generator
Bit 6 of ASIM6n
Bit 5 of ASIM6n
Clock selection register 6n
Baud rate generator control register 6n
POWER6n
Selector
User’s Manual U17554EJ4V0UD
f
XCLK6
POWER6n, TXE6n (or RXE6n)
BRGC6n: MDL67n to MDL60n
Match detector
8-bit counter
Baud rate generator
− 1 × 100 [%]
1/2
Baud rate
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