UPD78F0890GK(A)-GAJ-AX NEC, UPD78F0890GK(A)-GAJ-AX Datasheet - Page 70
UPD78F0890GK(A)-GAJ-AX
Manufacturer Part Number
UPD78F0890GK(A)-GAJ-AX
Description
8BIT MCU, 128K FLASH, 7K RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0890GKA-GAJ-AX.pdf
(732 pages)
Specifications of UPD78F0890GK(A)-GAJ-AX
Controller Family/series
UPD78F
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
10
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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3.3.3 Table indirect addressing
3.3.4 Register addressing
70
[Function]
[Illustration]
[Function]
[Illustration]
Table contents (branch destination address) of the particular location to be addressed by bits 1 to 5 of the
immediate data of an operation code are transferred to the program counter (PC) and branched.
This function is carried out when the CALLT [addr5] instruction is executed.
This instruction references the address stored in the memory table from 40H to 7FH, and allows branching to
the entire memory space.
Register pair (AX) contents to be specified with an instruction word are transferred to the program counter (PC)
and branched.
This function is carried out when the BR AX instruction is executed.
Effective address+1
Effective address
Operation code
rp
PC
7
15
PC
15
15
7
7
1
0
CHAPTER 3 CPU ARCHITECTURE
1
0
6
Memory (Table)
User’s Manual U17554EJ4V0UD
A
5
0
High Addr.
Low Addr.
0
ta
0
4–0
0
0
8
0
1
7
7
0
8
0
8
0
1
7
0
7
6
1
X
5
0
0
1
0
0
0
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