MCF5272VF66 Freescale, MCF5272VF66 Datasheet - Page 117

MCF5272VF66

Manufacturer Part Number
MCF5272VF66
Description
Manufacturer
Freescale
Datasheet

Specifications of MCF5272VF66

Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Not Compliant

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Freescale Semiconductor
Bits
4–3
1–0
6
5
2
Name
BWE
CM
WP
Cache mode. Defines whether the memory access is cacheable or noncacheable.
0 Caching enabled
1 Caching disabled
Buffered write enable. Generally, the enabling of buffered writes provides higher system performance but
recovery from access errors may be more difficult. For the ColdFire CPU, reporting access errors on operand
writes is always imprecise; enabling buffered writes further decouples the write instruction from the signaling
of the fault.
0 Termination of an operand write cycle on the processor's local bus is delayed until the external bus cycle
1 A write cycle on the local bus is terminated immediately and the operation is then buffered in the bus
Reserved, should be cleared.
Write protect. Selects the write privilege of the memory region.
0 Read and write accesses permitted
1 Write accesses not permitted
Reserved, should be cleared.
is completed.
controller. In this mode, operand write cycles are effectively decoupled between the processor's local bus
and the external bus.
MCF5272 ColdFire
Table 4-9. ACRn Field Descriptions (continued)
®
Integrated Microprocessor User’s Manual, Rev. 3
Description
Local Memory
4-15

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